The invention relates to semiconductor devices with self-aligned source or drain contacts and methods for making the same.
As the scale of transistors continues to decrease, it has become increasingly difficult to form a source or drain contact hole that exposes only the intended source or drain region, and does not also expose part of the gate electrode. If the source or drain contact reaches not only the source or drain but also the gate electrode, an electrical short is created and the transistor does not function.
A protective dielectric film such as SiN is therefore formed on the gate electrode and as gate sidewalls prior to contact hole formation, which protects the gate electrode during contact hole formation by reactive ion etching (RIE), since the RIE process is selective to the silicon dioxide interlayer dielectric in which the contact hole is to be formed, but selective against the SiN protective layer.
However, the conventional techniques and structures for protecting the gate electrode during contact hole formation, especially in the case of forming self-aligned source and drain contacts in replacement metal gate (RMG) transistors, are attended by several difficulties. Selective formation of a dielectric cap has been found to provide insufficient selectivity with respect to the region to be protected. Another proposal has been to oxidize and passivate the upper surface of the metal gate film; however, in that technique it is difficult to control the extent of oxidation of the metal, which can result in a resistivity increase at the gate electrode and increased variation in threshold voltage of the transistor. Yet another proposal has been to recess the metal electrode and cover it with a dielectric cap; however, conventional techniques for recessing a metal gate electrode involve RIE, which is difficult to perform in terms of processing time and selectivity.